{"id":2484,"date":"2003-10-22T06:11:52","date_gmt":"2003-10-22T04:11:52","guid":{"rendered":"https:\/\/destinationcyber.com\/?p=2484"},"modified":"2003-10-22T06:11:52","modified_gmt":"2003-10-22T04:11:52","slug":"retour-sur-le-prescott-dintel-que-cache-son-retard","status":"publish","type":"post","link":"https:\/\/destinationcyber.com\/?p=2484","title":{"rendered":"Retour sur le Prescott d&rsquo;Intel: que cache son retard?"},"content":{"rendered":"<p class=\"post_excerpt\">A force d&rsquo;affirmer que les retards d&rsquo;Intel proviennent d&rsquo;un d\u00e9faut de ma\u00eetrise de la technologie \u00e0 90 nanom\u00e8tres, ne passe-t-on pas \u00e0 c\u00f4t\u00e9 d&rsquo;un probl\u00e8me plus d\u00e9licat ? <\/p>\n<p>Las! La rumeur sur la difficile ma\u00eetrise de la technologie \u00e0 90 nanom\u00e8tres finirait par le laisser entendre! Mais alors pourquoi les retards portent-ils sur le Pentium 4 Prescott et non sur le Celeron Prescott, alors que ce dernier utilise la m\u00eame technologie ?<\/p>\n<p>En effet, le Celeron Prescott est proche du Pentium 4, sauf son &lsquo;cache&rsquo; L2 \u00e0 256Ko, tandis que son a\u00een\u00e9 embarque 1Mo de cache L2, et l&rsquo;absence d&rsquo;HyperThreading. Tous deux sont fabriqu\u00e9s en 90 nanom\u00e8tres et disposent d&rsquo;un bus \u00e0 533MHz.<\/p>\n<p>Si Intel fabrique du Celeron Prescott, lui aussi en 90 nanom\u00e8tres, mais prend du retard sur les Pentium 4 Prescott, c&rsquo;est donc ailleurs qu&rsquo;il faut chercher la cause. Difficile d&rsquo;\u00eatre renseign\u00e9 par Intel.<\/p>\n<p>Le <a href=\"http:\/\/www.xbitlabs.com\/news\/cpu\/display\/20031020100656.html\">site Xbit Laboratories<\/a> a \u00e9mis l&rsquo;hypoth\u00e8se d&rsquo;un probl\u00e8me li\u00e9 \u00e0 l&rsquo;augmentation du &lsquo;core-speed&rsquo; du Pentium 4 Prescott, donc de fr\u00e9quence. Une hypoth\u00e8se plausible, car le Pentium est beaucoup plus complexe que le Celeron. D&rsquo;o\u00f9 l&rsquo;\u00e9ventualit\u00e9 de probl\u00e8mes de surchauffe constituant d\u00e8s lors un d\u00e9faut majeur.<\/p>\n<p>[source &#8211; Silicon.fr]&nbsp;Yves Grandmontagne  <\/p>\n","protected":false},"excerpt":{"rendered":"<p>A force d&rsquo;affirmer que les retards d&rsquo;Intel proviennent d&rsquo;un d\u00e9faut de ma\u00eetrise de la technologie \u00e0 90 nanom\u00e8tres, ne passe-t-on pas \u00e0 c\u00f4t\u00e9 d&rsquo;un probl\u00e8me plus d\u00e9licat ? <\/p>\n","protected":false},"author":1,"featured_media":0,"comment_status":"closed","ping_status":"open","sticky":false,"template":"","format":"standard","meta":{"_citadela_custom_class":"","footnotes":""},"categories":[14],"tags":[],"class_list":["post-2484","post","type-post","status-publish","format-standard","hentry","category-matos"],"_links":{"self":[{"href":"https:\/\/destinationcyber.com\/index.php?rest_route=\/wp\/v2\/posts\/2484","targetHints":{"allow":["GET"]}}],"collection":[{"href":"https:\/\/destinationcyber.com\/index.php?rest_route=\/wp\/v2\/posts"}],"about":[{"href":"https:\/\/destinationcyber.com\/index.php?rest_route=\/wp\/v2\/types\/post"}],"author":[{"embeddable":true,"href":"https:\/\/destinationcyber.com\/index.php?rest_route=\/wp\/v2\/users\/1"}],"replies":[{"embeddable":true,"href":"https:\/\/destinationcyber.com\/index.php?rest_route=%2Fwp%2Fv2%2Fcomments&post=2484"}],"version-history":[{"count":0,"href":"https:\/\/destinationcyber.com\/index.php?rest_route=\/wp\/v2\/posts\/2484\/revisions"}],"wp:attachment":[{"href":"https:\/\/destinationcyber.com\/index.php?rest_route=%2Fwp%2Fv2%2Fmedia&parent=2484"}],"wp:term":[{"taxonomy":"category","embeddable":true,"href":"https:\/\/destinationcyber.com\/index.php?rest_route=%2Fwp%2Fv2%2Fcategories&post=2484"},{"taxonomy":"post_tag","embeddable":true,"href":"https:\/\/destinationcyber.com\/index.php?rest_route=%2Fwp%2Fv2%2Ftags&post=2484"}],"curies":[{"name":"wp","href":"https:\/\/api.w.org\/{rel}","templated":true}]}}